Multiplexer_strutture_funzioni_definizioni

Table of Contents

• User use of the ADC/Mux on mainboard
• User use of the ADC/Mux on postmainboard

ADC/Mux ADG1408 description page

SUMMARY:

• User use of the ADC/Mux on mainboard
• User use of the ADC/Mux on postmainboard

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This chip is the ADG1408 (ADG1408 datasheet). 2 ADG1408 are on the mainobard and 8 are present on the postmainboard.

User use of the ADC/Mux on mainboard

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Thre are 2 ADG1408 chips on the board whose scheme is in figure Figure_Analog_mux. Each one allows to multiplex 8 analog inputs into one ouput. To select the input 4 signals are needed. The chip select that, for this chip, is active high and 3 parallel lines that codify the selected inpt. Once this is done, the output is available to be measured from the ADC. The series resistance of the chip is smaller than 10 Ω and 100 Ω are connected in series to the ouput for protecion.
To manage the chip there is only one function: Analog_mux_line_to_select_deselect( uint8_t scheda_su_scheda_giu, uint8_t line_to_select, uint8_t select_1_deselect_0) that is called 2 times in measurement. First it needs to activate the output and the parameter select_1_deselect_0 is 1. line_to_select is the line to select according to the following list, where the numbers on the left are the code to pass, and the definition on the right of the numbers are their equivalent aliases:

• The first analog mux has connected the following nodes, whose adrresses are on the left (the starting offset is defined as node_voltage_Analog_Mux_0_offset):
  32. node_voltage_Analog_Mux_meas_bias_pos_ch0
  33. node_voltage_Analog_Mux_meas_bias_neg_ch0
  34. node_voltage_Analog_Mux_meas_bias_pos_ch1
  35. node_voltage_Analog_Mux_meas_bias_neg_ch1
  36. node_voltage_Analog_Mux_meas_bias_pos_ch2
  37. node_voltage_Analog_Mux_meas_bias_neg_ch2
  38. node_voltage_Analog_Mux_meas_bias_pos_ch3
  39. node_voltage_Analog_Mux_meas_bias_neg_ch3
• The second analog mux has connected the following nodes, whose adrresses are on the left (the starting offset is defined at node_voltage_Analog_Mux_1_offset):
  40. node_voltage_Analog_Mux_meas_bias_pos_ch4
  41. node_voltage_Analog_Mux_meas_bias_neg_ch4
  42. node_voltage_Analog_Mux_meas_bias_pos_ch5
  43. node_voltage_Analog_Mux_meas_bias_neg_ch5
  44. node_voltage_Analog_Mux_meas_input_bias_pos
  45. node_voltage_Analog_Mux_meas_input_bias_neg
  46. node_voltage_Analog_Mux_meas_none
  47. node_voltage_Analog_Mux_meas_10k_to_gnd

Note

Mux_1 output is routed at pin 15 and Mux_2 output is routed at pin 16 of the 50 pins header output connector of the mainboard A. Note that the 2 nodes is better if read with respect to the local ground, pins 13, 14, 17 and 18 of the same connector.

Once the measurement is done the function is called again with the same parameters, except select_1_deselect_0 that must be 0 this time.
Here an example of use of Analog_mux_line_to_select_deselect():

function_which_must_use_the_ADC( scheda_su_acheda_giu, node_to_measure){
 
      Analog_mux_line_to_select_deselect( scheda_su_acheda_giu,   node_to_measure, 1);  //the node is enabled to the output
      
      //Measure with the ADC
      
      Analog_mux_line_to_select_deselect( scheda_su_acheda_giu,   node_to_measure, 0);  //the node is de-selected
  }

See also

The analog mux's on mainboard are managed by the I2C to parallel chips: I2C_to_parallel

Figure_Analog_mux 1: Analog mux scheme

User use of the ADC/Mux on postmainboard

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Postmainboard has 2 ADCs dedicated each to one of the 2 connected mainboards. Nodes to measure are routed by 2 groups of 4 analog multiplexers. In this case chip select lines and selection lines are all provided by the microcontroller and some functions are available:

• Configure_Reset_selection_port_analog_mux_ResIn_ADC_buffer(void);
• Analog_mux_line_to_select_deselect_for_postmainboard( uint8_t scheda_su_scheda_giu, uint8_t line_to_select, uint8_t select_1_deselect_0 )

Configure_Reset_selection_port_analog_mux_ResIn_ADC_buffer() is called at startup to set the pins and set the mux's in idle mode. It alsosets the pins for the switch put in series to the resistors at the ADC buffer input. The aim of this switch is to set this equivalent impedance to infinite value when the node voltage to measure is connected. Due to the fact that an attenuation is needed to avoid the rails the switches are always maintained in the closed state.
Analog_mux_line_to_select_deselect_for_postmainboard(), needs to know the mainboard to manage by scheda_su_scheda_giu, the node to measure by line_to_select and the setting of the path of the node to the ADC and is disconnession, by select_1_deselect_0. line_to_select are those listed at lista_nodi.
On the postamainboard there are 8 analog multiplexers, 2 groups of 4 for each connected mainboard. The multiplexers have simmetrical connections. To individuate an input line the syntax is: bits 0 to 3 are common to all the MUXs and select one of the input analog lines; bits 4 to 5 are the address for the chips select for the 2 groups of 4 MUXs. The selection of the MUX group is trhough the board_up_down. To select the lines a vector is dedicated to this. It is ADC_node_map[]:

const uint8_t ADC_node_map[]=
{
/*PGA diff or PGA pos  indici da 0  a 5 */
Mux_analog_postmainboard_lines_2_PGA_Output_pos_1, Mux_analog_postmainboard_lines_2_PGA_Output_pos_2,
Mux_analog_postmainboard_lines_2_PGA_Output_pos_3,Mux_analog_postmainboard_lines_2_PGA_Output_pos_4,
Mux_analog_postmainboard_lines_2_PGA_Output_pos_5,Mux_analog_postmainboard_lines_2_PGA_Output_pos_6,
/*PGA neg indici da 6  a 11 */  
Mux_analog_postmainboard_lines_3_PGA_Output_neg_1,Mux_analog_postmainboard_lines_3_PGA_Output_neg_2,
Mux_analog_postmainboard_lines_3_PGA_Output_neg_3,Mux_analog_postmainboard_lines_3_PGA_Output_neg_4,
Mux_analog_postmainboard_lines_3_PGA_Output_neg_5,Mux_analog_postmainboard_lines_3_PGA_Output_neg_6,
/*PRE diff o pos indici da 12  a 17 */      
Mux_analog_postmainboard_lines_1_PRE_pos_1,Mux_analog_postmainboard_lines_1_PRE_pos_2,
Mux_analog_postmainboard_lines_1_PRE_pos_3,Mux_analog_postmainboard_lines_1_PRE_pos_4,
Mux_analog_postmainboard_lines_1_PRE_pos_5,Mux_analog_postmainboard_lines_1_PRE_pos_6,
/*PRE neg  indici da 18  a 23 */    
Mux_analog_postmainboard_lines_0_PRE_neg_1,Mux_analog_postmainboard_lines_0_PRE_neg_2,
Mux_analog_postmainboard_lines_0_PRE_neg_3,Mux_analog_postmainboard_lines_0_PRE_neg_4,
Mux_analog_postmainboard_lines_0_PRE_neg_5,Mux_analog_postmainboard_lines_0_PRE_neg_6,
/*Vcc indice 24*/       
Mux_analog_postmainboard_lines_2_Vcc_meas,
/*Vee indice 25*/       
Mux_analog_postmainboard_lines_3_Vee_meas,
/*Vdig indice 26*/          
Mux_analog_postmainboard_lines_3_Vdig_5V_meas,
/*Vreg_n indice 27*/            
Mux_analog_postmainboard_lines_1_SenseVreg_n,
/*Vreg_p indice 28*/    
Mux_analog_postmainboard_lines_1_SenseVreg_p,
/*GND sense indice 29*/ 
Mux_analog_postmainboard_lines_2_SenseGA,
/*Analog mux wire 1 indice 30*/
Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,
/*Analog mux wire 2 indice 31*/
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out, 
/*Analog mux connessi al wire 1 indici 32 a 39*/
Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,
Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,
Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,
Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,Mux_analog_postmainboard_lines_0_Analog_Mux_1_out,
/*Analog mux connessi al wire 2 indici 40 a 45 (da 46 a 47 buco)*/
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
/*Analog mux none indice 48*/
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
/*Analog mux 10 Kohm indice 49*/
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
/*Dummy per selezionare ADC0 indice 50*/
Mux_analog_postmainboard_lines_0_Analog_Mux_2_out,
/*Dummy per selezionare ADC0 indice 51*/
Mux_analog_postmainboard_lines_2_PGA_Output_pos_3};

The codes for mamnaging the mux are:

• Multiplexer_strutture_funzioni_definizioni.c
  
• Multiplexer_strutture_funzioni_definizioni.h